Design and Characterization of a Prototype Pixel Readout Chip for Synchrotron Single Photon-Counting Detectors with 50 µm Pitch and 20 e − rms ENC Noise

Abstract

As synchrotron radiation sources (SRSs) expand to cover a broader energy range, the demand for hybrid detectors with improved spatial and energy resolution is increasing. This paper presents the design and characterization of a prototype pixel readout ASIC featuring a small pixel size and low noise, developed for low energy soft X-ray applications. This chip adopts the single photon-counting (SPC) approach and each pixel consists of a front-end amplifier, a discriminator, a charge injection circuitry and a pair of 15-bit counters with associated logic. Fabricated in a 130 nm CMOS process, the chip integrates a 2 × 16 pixel matrix with a 50 µm ×50 µm pixel size. Measurement results indicate the maximum pixel equivalent noise charge (ENC) across the matrix is 20 e−rms without sensor attached. The results validate that the chip design has the potential to deliver a low-energy resolution for soft X-ray applications.