17 papers · ranked by Valyu relevance
Hong-Zhe Yang, Jian-Peng Dou, Feng Lu, Xiao-Wen Shang + 4 more
In-memory computing, which enables computation directly within memory, represents an efficient approach to processing massively parallel computation tasks that are intractable for conventional computers. However, implementations of in-memory computing have been primarily limited to the classical regime, with its…
Parker Hao Tian, Zahra Yousefijamarani, Alaa R. Alameldeen
—Processing-in-Memory (PIM) architectures aim to reduce data transfer costs between processors and memory by integrating processing units within memory layers. Prior PIM architectures have shown potential to improve energy efficiency and performance. However, such advantages rely on data proximity to the processing…
Guobin Zhang, Xuemeng Fan, Zijian Wang, Pengtao Li + 7 more
Title: Highlights 1. SRMs integrate intrinsic diode-like rectification, enabling sneak path suppression in crossbar arrays without external selectors, simplifying design, and enhancing energy efficiency for high-density in-memory computing. 2. Key metrics such as rectification ratio, nonlinearity, and CMOS…
Hao Hu, Yian Liu, Shuang Liu, Junjie Wang + 15 more
To meet the demand for energy-efficient and high-performance computing in resource-limited sensor edge applications, this paper presents a reconfigurable memristor-based computing-in-memory circuit for Content-Addressable Memory (CAM). The scheme exploits the analog multi-level resistance characteristics of memristors…
Siddhartha Raman Sundara Raman, Siyuan Ma, Lizy Kurian John
Compute-in-memory (PIM) mitigates the memory wall by performing computation within memory, reducing data movement and improving energy efficiency. DRAM-based PIM is particularly attractive due to its high density, mature manufacturing ecosystem, and compatibility with existing systems. Recent works exploit multiple…
Sohan Salahuddin Mugdho, Md. Shahedul Hasan, Brahmdutta Dixit, Yang Lv + 2 more
Deep neural networks (DNNs) have achieved state-of-the-art performance across diverse domains. However, typical Von Neumann compute paradigms face severe memory bottlenecks. Emerging near-memory and compute-in-memory approaches alleviate this but incur significant peripheral overhead. Computational Random Access Memory…
Zhihan Wang, Haiwen Li, Sheng Jiang, Seiichi Miyazaki
Magnetoresistive random-access memory (MRAM), as a promising non-volatile memory technology, has attracted extensive research interest owing to its unique combination of high operating speed, exceptional endurance, low standby power consumption, and CMOS process compatibility. In this review, we provide a comprehensive…
Yuan He, Masaaki Kondo, Galen M. Shipman, Jered B. Dominguez-Trujillo + 2 more
Processing-in-Memory addresses the memory wall by co-locating computation with memory, but because real PIM hardware remains scarce, simulation is the primary way to explore the PIM design space. Yet existing PIM simulators each cover only part of that space: they typically model a single memory technology, fix…
Peter M. Kogge
| 1 | | Introduction 2 | | |---|---------|---------------------------------------------------------------|--| | | 1.1 | Organization 2 | | | | 1.2 | Design-specific Papers 2 | | | | 1.3 | Change Log 2 | | | 2 | Surveys | 3 | | | 3 | | Specific System Design Studies 3 | | | | 3.1 | 1969: Cellular Logic in Memory 3 | | |…
Mahdi Aghaei, Ebrahimi, Saba, Mohammad Saleh Arafati + 4 more
Processing-in-Memory (PIM) has emerged as a promising computing paradigm to address the memory wall and the fundamental bottleneck of the von Neumann architecture by reducing costly data movement between memory and processing units. As with any engineering challenge, identifying the most effective solutions requires…
Hongyu Tang, Ninghai Yu, Pengsheng Min, Ruiqian Guo + 1 more
Title: Highlights 1. In-sensor-memory computing (ISMC) resolves von Neumann bottlenecks via synergistic innovations across multi-dimensional functional materials, hybrid architectures, and algorithm-hardware co-design. 2. This paradigm empowers ultra-low-latency edge applications, paving the way for autonomous systems…
Liam Splittgerber, Fabian Seiler, Nima TaheriNejad
The push towards expanded ultra-low-power edge computing necessitates hardware capable of operating under extremely strict energy constraints. Traditional Complementary Metal-Oxide-Semiconductor (CMOS) microcontrollers are fundamentally limited in this domain by the von Neumann bottleneck and by the static power…
Yi Sun, Peiwen Tong, Jiangrong Shen, Hui Xu + 8 more
Neuromorphic vision systems based on memristors offer an energy-efficient approach to artificial vision, yet traditional pixel(s)-to-one-memristor architectures remain inefficient in dynamic image processing due to limited temporary storage. Here, inspired by human visual working memory, we propose a…
Siddhartha Raman Sundara Raman
As conventional technology scaling approaches physical and power limitations, modern computing systems increasingly face performance bottlenecks arising from memory latency, energy consumption, scalability constraints, and data movement overheads. Simultaneously, emerging workloads such as machine learning, graph…
William Dorrell, Peter E. Latham, Timothy E. J. Behrens, James C. R. Whittington
The efficient coding hypothesis presents a compelling success story for theoretical and systems neuroscience. It marshals a unifying idea, that neural codes can be understood as efficient encodings of natural stimuli, to explain phenomena from across sensory systems, sometimes with exquisite precision. However, similar…
Roselyne J. Chauvin, Annie Zheng, Athanasia Metoki, Samuel R. Krimmel + 19 more
Memory athletes can achieve superior performance (e.g., memorizing 339 digits in 5 minutes) with extensive daily training, by converting abstract information into vivid scenes, and placing them along a mental path, that is then retraced at recall (Method of Loci). Understanding the brain mechanisms underlying such…
Afroditi Talidou, Wilten Nicola
Many existing models of computation in recurrent neural networks assume dense, unconstrained initial connectivity, where any pair of neurons may be coupled to generate the rich dynamics needed for learning complex temporal patterns. Inspired by invertebrate circuits that often exhibit ring-like connectivity, we show…