Search · four archives

Results for FPGA implementation

or ask it as a questionAsk the stacks →

ArchivesarXiv PubMed bioRxiv chemRxiv

WhenAny time Past month Past year Past 5 years

OrderMost relevant Most cited Newest

20 papers · ranked by Valyu relevance

01
PPubMed30 Jan 2024
FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification
Maruf Ahmad, Lei Zhang, Muhammad E. H. Chowdhury
This proposed research explores a novel approach to image classification by deploying a complex-valued neural network (CVNN) on a Field-Programmable Gate Array (FPGA), specifically for classifying 2D images transformed into polar form. The aim of this research is to address the limitations of existing neural network…
83relevance
02
AarXiv2023
An Implementation of a Dual-Processor System on FPGA
Mohammed Eqbal Eshaq
In recent years, Field-Programmable Gate Arrays (FPGA) have evolved rapidly paving the way for a whole new range of computing paradigms. On the other hand, computer applications are evolving. There is a rising demand for a system that is general-purpose and yet has the processing abilities to accommodate current trends…
83relevance
03
PPubMed11 Apr 2023
High-Speed Variable Polynomial Toeplitz Hash Algorithm Based on FPGA
Si-Cheng Huang, Shan Huang, Hua-Lei Yin, Qing-Li Ma + 3 more
'Giuliano Benenti' 'Ying Guo'] In the Quantum Key Distribution (QKD) network, authentication protocols play a critical role in safeguarding data interactions among users. To keep pace with the rapid advancement of QKD technology, authentication protocols must be capable of processing data at faster speeds. The Secure…
82relevance
04
PPubMed6 Sep 2012
Sensor Systems Based on FPGAs and Their Applications: A Survey
Antonio de la Piedra, An Braeken, Abdellah Touhafi
In this manuscript, we present a survey of designs and implementations of research sensor nodes that rely on FPGAs, either based upon standalone platforms or as a combination of microcontroller and FPGA. Several current challenges in sensor networks are distinguished and linked to the features of modern FPGAs. As it…
81relevance
05
PPubMed31 Mar 2014
A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing
Gabriel J. García, Carlos A. Jara, Jorge Pomares, Aiman Alabdo + 2 more
'Lucas M. Poggi' 'Fernando Torres'] The current trend in the evolution of sensor systems seeks ways to provide more accuracy and resolution, while at the same time decreasing the size and power consumption. The use of Field Programmable Gate Arrays (FPGAs) provides specific reprogrammable hardware technology that can…
81relevance
06
BbioRxiv2 Jun 2023
*minimap2-fpga*: Integrating hardware-accelerated chaining for efficient end-to-end long-read sequence mapping
Kisaru Liyanage, Hiruna Samarakoon, Sri Parameswaran, Hasindu Gamaarachchi
minimap2 is the gold-standard software for reference-based sequence mapping in third-generation long-read sequencing. While minimap2 is relatively fast, further speedup is desirable, especially when processing a multitude of large datasets. In this work, we present minimap2-fpga, a hardware-accelerated version of…
80relevance
07
BbioRxiv23 May 2023
Artificial cerebellum on FPGA: Realistic real-time cerebellar spiking neural network model capable of real-world adaptive motor control
Yusuke Shinji, Hirotsugu Okuno, Yutaka Hirata
The cerebellum plays a central role in motor control and learning. Its neuronal network architecture, firing characteristics of component neurons, and learning rules at their synapses have been well understood in terms of anatomy and physiology. A realistic artificial cerebellum with mimetic network architecture and…
80relevance
08
PPubMed21 Nov 2024
Image Processing Hardware Acceleration—A Review of Operations Involved and Current Hardware Approaches
Costin-Emanuel Vasile, Andrei-Alexandru Ulmămei, Călin Bîră, Guillermo Botella Juan
'Guillermo Botella Juan'] This review provides an in-depth analysis of current hardware acceleration approaches for image processing and neural network inference, focusing on key operations involved in these applications and the hardware platforms used to deploy them. We examine various solutions, including traditional…
80relevance
09
AarXiv2018
Design paradigms of intelligent control systems on a chip
Kyriakos M. Deliparaschos, Spyros G. Tzafestaş
— This paper focuses on the Field Programmable Gate Array (FPGA) design and implementation of intelligent control system applications on a chip, specifically fuzzy logic and genetic algorithm processing units. Initially, an overview of the FPGA technology is presented, followed by design methodologies, development…
80relevance
10
AarXiv4 Nov 2025
Beyond the GPU: The Strategic Role of FPGAs in the Next Wave of AI
Jiménez, Arturo Urías
AI acceleration has been dominated by GPUs, but the growing need for lower latency, energy efficiency, and fine-grained hardware control exposes the limits of fixed architectures. In this context, Field-Programmable Gate Arrays (FPGAs) emerge as a reconfigurable platform that allows mapping AI algorithms directly into…
80relevance
11
AarXiv28 Sep 2018
Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems.
Daniel Ziener
Tag der Einreichung: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 08. Marz 2017 ¨ Erteilung der Lehrbefahigung ( ¨ venia legendi): . . . . . . . . . . 13. Dezember 2017
79relevance
12
BbioRxiv27 Jul 2021
Parallel Implementation of Smith-Waterman Algorithm on FPGA
Fabio F. de Oliveira, Leonardo A. Dias, Marcelo A. C. Fernandes
In bioinformatics, alignment is an essential technique for finding similarities between biological sequences. Usually, the alignment is performed with the Smith-Waterman (SW) algorithm, a well-known sequence alignment technique of high-level precision based on dynamic programming. However, given the massive data volume…
78relevance
13
AarXiv2017
FPGA with Improved Routability and Robustness in 130nm CMOS with Open-Source CAD Targetability
Guanshun Yu, Tom Y. Cheng, Blayne Kettlewell, Harrison Liew + 2 more
'Mingoo Seok' 'Peter R. Kinget'] Abstract—This paper outlines an FPGA VLSI design methodology that was used to realize a fully functioning FPGA chip in 130nm CMOS with improved routability and memory robustness. The architectural design space exploration and synthesis capability were enabled by the Verilog-to-Routing…
78relevance
14
PPubMed7 Aug 2024
A High-Performance FPGA PRNG Based on Multiple Deep-Dynamic Transformations
Shouliang Li, Zichen Lin, Yi Yang, Ruixuan Ning + 1 more
Pseudo-random number generators (PRNGs) are important cornerstones of many fields, such as statistical analysis and cryptography, and the need for PRNGs for information security (in fields such as blockchain, big data, and artificial intelligence) is becoming increasingly prominent, resulting in a steadily growing…
76relevance
15
PPubMed17 Jun 2024
SHA-256 Hardware Proposal for IoT Devices in the Blockchain Context
Carlos E. B. Santos Jr., Lucileide M. D. da Silva, Matheus F. Torquato, Sérgio N. Silva + 2 more
'Matheus F. Torquato' 'Sérgio N. Silva' 'Marcelo A. C. Fernandes' 'Tee Hui Teo'] This work proposes an implementation of the SHA-256, the most common blockchain hash algorithm, on a field-programmable gate array (FPGA) to improve processing capacity and power saving in Internet of Things (IoT) devices to solve security…
74relevance
16
PPubMed13 May 2024
Exploring memory synchronization and performance considerations for FPGA platform using the high-abstracted OpenCL framework: Benchmarks development and analysis FPGA-based Memory Synchronization
Abedalmuhdi Almomany, Amin Jarrah, Muhammed Sutcu, Jun Ma
A key benefit of the Open Computing Language (OpenCL) software framework is its capability to operate across diverse architectures. Field programmable gate arrays (FPGAs) are a high-speed computing architecture used for computation acceleration. This study investigates the impact of memory access time on overall…
74relevance
17
BbioRxiv30 Dec 2022
Closing the Bio-Silicon Loop for Cellular Neural Prosthesis using FPGA-based Iono-Neuromorphic Models
Junwen Luo
Neural ptosthetic devices offer the ability to develop novel treatments for previously incurable diseases and ailments, such as deafness, blindness and tetraplepia. There is the potential to extend this concept to incorporate cognitive prosthetics, whereby damaged individual neuron cells or larger brain regiops are…
72relevance
18
BbioRxiv19 Dec 2018
Massively Parallel FPGA Hardware for Spike-By-Spike Networks
David Rotermund, Klaus R. Pawelzik
While inspired by the brain, currently successful artificial neural networks lack key features of the biological original. In particular, the deep convolutional networks (DCNs) neither use pulses as signals exchanged among neurons, nor do they include recurrent connections which are both core properties of real…
72relevance
19
AarXiv9 May 2018
Parallel Programming for FPGAs
Ryan Kastner, Janarbek Matai, Stephen Neuendorffer
Ryan Kastner, Janarbek Matai, and Stephen Neuendorffer 2018-05-11 Copyright 2011-2018. This work is licensed under the Creative Commons Attribution 4.0 International License. To view a copy of this license, visit http://creativecommons.org/licenses/by/3.0/. The newest version of this book can be found at…
70relevance
20
CchemRxiv15 Jun 2022
A Mixed-Precision Implementation of the Density Matrix Renormalization Group
Yingqi Tian, Zhaoxuan Xie, Zhen Luo, Haibo Ma
Using the mixed precision strategy to optimize quantum chemistry codes has been proved promising in saving computational cost and maintaining chemical accuracy. Here, an efficient mixed-precision density matrix renormalization group (DMRG) scheme, containing a two-level mixed-precision hierarchy, is developed and…
54relevance

Results for FPGA implementation

FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification

An Implementation of a Dual-Processor System on FPGA

High-Speed Variable Polynomial Toeplitz Hash Algorithm Based on FPGA

Sensor Systems Based on FPGAs and Their Applications: A Survey

A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing

*minimap2-fpga*: Integrating hardware-accelerated chaining for efficient end-to-end long-read sequence mapping

Artificial cerebellum on FPGA: Realistic real-time cerebellar spiking neural network model capable of real-world adaptive motor control

Image Processing Hardware Acceleration—A Review of Operations Involved and Current Hardware Approaches

Design paradigms of intelligent control systems on a chip

Beyond the GPU: The Strategic Role of FPGAs in the Next Wave of AI

Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems.

Parallel Implementation of Smith-Waterman Algorithm on FPGA

FPGA with Improved Routability and Robustness in 130nm CMOS with Open-Source CAD Targetability

A High-Performance FPGA PRNG Based on Multiple Deep-Dynamic Transformations

SHA-256 Hardware Proposal for IoT Devices in the Blockchain Context

Exploring memory synchronization and performance considerations for FPGA platform using the high-abstracted OpenCL framework: Benchmarks development and analysis FPGA-based Memory Synchronization

Closing the Bio-Silicon Loop for Cellular Neural Prosthesis using FPGA-based Iono-Neuromorphic Models

Massively Parallel FPGA Hardware for Spike-By-Spike Networks

Parallel Programming for FPGAs

A Mixed-Precision Implementation of the Density Matrix Renormalization Group

FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification

An Implementation of a Dual-Processor System on FPGA

High-Speed Variable Polynomial Toeplitz Hash Algorithm Based on FPGA

Sensor Systems Based on FPGAs and Their Applications: A Survey

A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing

*minimap2-fpga*: Integrating hardware-accelerated chaining for efficient end-to-end long-read sequence mapping

Artificial cerebellum on FPGA: Realistic real-time cerebellar spiking neural network model capable of real-world adaptive motor control

Image Processing Hardware Acceleration—A Review of Operations Involved and Current Hardware Approaches

Design paradigms of intelligent control systems on a chip

Beyond the GPU: The Strategic Role of FPGAs in the Next Wave of AI

Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems.

Parallel Implementation of Smith-Waterman Algorithm on FPGA

FPGA with Improved Routability and Robustness in 130nm CMOS with Open-Source CAD Targetability

A High-Performance FPGA PRNG Based on Multiple Deep-Dynamic Transformations

SHA-256 Hardware Proposal for IoT Devices in the Blockchain Context

Exploring memory synchronization and performance considerations for FPGA platform using the high-abstracted OpenCL framework: Benchmarks development and analysis FPGA-based Memory Synchronization

Closing the Bio-Silicon Loop for Cellular Neural Prosthesis using FPGA-based Iono-Neuromorphic Models

Massively Parallel FPGA Hardware for Spike-By-Spike Networks

Parallel Programming for FPGAs

A Mixed-Precision Implementation of the Density Matrix Renormalization Group

minimap2-fpga: Integrating hardware-accelerated chaining for efficient end-to-end long-read sequence mapping

minimap2-fpga: Integrating hardware-accelerated chaining for efficient end-to-end long-read sequence mapping