16 papers · ranked by Valyu relevance
Douglas R. Melo, Cesar A. Zeferino, Luigi Dilillo, Eduardo A. Bezerra
'Eduardo A. Bezerra'] Reducing component size and increasing the operating frequency of integrated circuits makes the Systems-on-Chip (SoCs) more susceptible to faults. Faults can cause errors, and errors can be propagated and lead to a system failure. SoCs employing many cores rely on a Network-on-Chip (NoC) as the…
Mazdak Fatahi, Masou Soursouri, Pooya Pourmohammad, Mahmood Ahmadi
Variety, size and complexity of data types, services and applications in Internet is continuously growing up. This increasing of complexity needs more powerful and sophisticated equipment's. One group of these devices that has essential role are routers. Some of vendors produce some elaborate and complex products but…
Alberto Scionti, Somnath Mazumdar, Antoni Portero
The rapid evolution of Cloud-based services and the growing interest in deep learning (DL)-based applications is putting increasing pressure on hyperscalers and general purpose hardware designers to provide more efficient and scalable systems. Cloud-based infrastructures must consist of more energy efficient…
Wo-Tak Wu
— Network-on-Chip (NoC) has become a popular choice for connecting a large number of processing cores in chip multiprocessor design. In a conventional NoC design, most of the area in the router is occupied by the buffers and the crossbar switch. These two components also consume the majority of the router's power. Much…
Salman Onsori, Farshad Safaei
This study proposes a new router architecture to improve the performance of dynamic allocation of virtual channels. The proposed router is designed to reduce the hardware complexity and to improve power and area consumption, simultaneously. In the new structure of the proposed router, all of the controlling components…
Charles Effiong, Gilles Sassatelli, Abdoulaye Gamatié, Abdelkrim Zitouni
'Abdelkrim Zitouni'] Networks-on-Chip (NoCs) have become the de-facto on-chip interconnect for multi/manycore systems. A typical NoC router is made up of buffers used to store packets that are unable to advance to their desired destination. However, buffers consume significant power/area and are often underutilized…
Samalika Perera, Ying Xu, André van Schaik, Runchun Wang
A reconfigurable hardware accelerator implementation for spiking neural network (SNN) simulation using field-programmable gate arrays (FPGAs) is promising and attractive research because massive parallelism results in better execution speed. For large-scale SNN simulations, a large number of FPGAs are needed. However…
Raja Jitendra Nayaka, Rajashekhar C. Biradar
As the demand for Internet expands significantly in numbers of users, servers, IP addresses, switches and routers, the IP based network architecture must evolve and change. The design of domain specific processors that require high performance, low power and high degree of programmability is the bottleneck in many…
Yuling Luo, Lei Wan, Junxiu Liu, Jim Harkin + 3 more
'Xuemei Ding'] A novel low cost interconnected architecture (LCIA) is proposed in this paper, which is an efficient solution for the neuron interconnections for the hardware spiking neural networks (SNNs). It is based on an all-to-all connection that takes each paired input and output nodes of multi-layer SNNs as the…
Sajid Gul Khawaja, Mian Hamza Mushtaq, Shoab A. Khan, M. Usman Akram + 2 more
'Habib ullah Jamal' 'Yong Deng'] With the increase of transistors' density, popularity of System on Chip (SoC) has increased exponentially. As a communication module for SoC, Network on Chip (NoC) framework has been adapted as its backbone. In this paper, we propose a methodology for designing area-optimized…
Zhou Jingjing, Cheng Di, Wang Weiming, Jin Rong + 1 more
Software defined network (SDN) provides a programmable network through decoupling the data plane, control plane, and application plane from the original closed system, thus revolutionizing the existing network architecture to improve the performance and scalability. In this paper, we learned about the distributed…
Chaoran Sun, Milena Radenkovic
Optimizing Multi-site Enterprise Networks Authors: ['Chaoran Sun' 'Milena Radenkovic'] Abstract— Enterprise networks are becoming increasingly complex, posing challenges for traditional WANs in terms of scalability, management, and operational costs. Software Defined Networking (SDN) and its application in Wide Area…
Authors not listed
Effective visualization of complex synthesis routes is critical for computeraided synthesis planning (CASP), yet current solutions are limited in scope, integration flexibility, and chemical intuition. We introduce RouteWise, a versatile, containerized web application designed to address these unmet needs. Its modular…
Caio Seguin, Maria Grazia Puxeddu, Joshua Faskowitz, Richard F. Betzel + 1 more
Connectomes are the structural scaffold for signalling within nervous systems. While many network models have been proposed to describe connectome communication, current approaches assume that every pair of neural elements communicates according to the same principle. Connectomes, however, are heterogeneous networks…
Insuk Lee, Eiru Kim, Edward M. Marcotte
We find that the topologies of real world networks, such as those formed within human societies, by the Internet, or among cellular proteins, are dominated by the mode of the interactions considered among the individuals. Consequently, a major dichotomy in previously studied networks arises from modeling networks in…
Liang Wang
How do multi-modal large language models that jointly process natural language and biological sequences (DNA, protein, structural alphabets) actually answer biological questions, especially sequence-grounded questions whose answer depends on residue-level patterns rather than literature recall? We introduce OmniGene-4…