18 papers · ranked by Valyu relevance
Atharva M. Kulkarni, Abhay Chopde
—The design and production of VLSI chips is a multilevel heirarchical process. As the demand for reduced diearea and technology nodes becomes prevalent, it gets increasingly challenging to optimize Power, Performance and Area (PPA) parameters to accommodate for the ever-increasing core logic on a chip. A well defined…
Aditya Kulkarni, Atharva Kulkarni, Ankit Lad, Laksh Maheshwari + 1 more
'Jayant Majji'] Abstract: The growing advances in VLSI technology and design tools have exponentially expanded the application domain of digital signal processing over the past 10 years. This survey emphasises on the architectural and performance parameters of VLSI for DSP applications such as speech processing…
Deepthi Amuru, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram + 3 more
'Sushanth R. Gurram' 'Amir Ahmad' 'Andleeb Zahra' 'Zia Abbas'] An evident challenge ahead for the integrated circuit (IC) industry is the investigation and development of methods to reduce the design complexity ensuing from growing process variations and curtail the turnaround time of chip manufacturing. Conventional…
Byung‐Kwan Lee, Ryo Hachiuma, Yu-Chiang Frank Wang, Yong Man Ro + 1 more
The recent surge in high-quality visual instruction tuning samples from closed-source vision-language models (VLMs) such as GPT-4V has accelerated the release of open-source VLMs across various model sizes. However, scaling VLMs to improve performance using larger models brings significant computational challenges…
Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani
'Ahmed Hemani'] Abstract—Synchoros VLSI design style has been proposed as an alternative to standard cell-based design. Standard cells are replaced by synchoros large grain VLSI design objects called SiLago blocks. This new design style enables end-to-end automation of large scale designs by abutting the SiLago blocks…
Sung-Joon Jang, Youngbae Hwang
The range kernel of bilateral filter degrades image quality unintentionally in real environments because the pixel intensity varies randomly due to the noise that is generated in image sensors. Furthermore, the range kernel increases the complexity due to the comparisons with neighboring pixels and the multiplications…
Doru Florin Chiper, Arcadie Cracan, Florin Alexa, Marius Otesteanu + 2 more
'Cătălin Căleanu' 'Daniel-Ioan Curiac'] In this paper, we present two systolic array algorithms for efficient Very-Large-Scale Integration (VLSI) implementations of the 1-D Modified Discrete Sine Transform (MDST) using the systolic array architectural paradigm. The new algorithms decompose the computation of the MDST…
Jordi Altayó González, Dimitrios Stathis, Ahmed Hemani
— Synchoros VLSI design style has been proposed as an alternative to the standard cell best design style; the word synchoros is derived from the Greek word choros for space. Synchoricity discretises space with a virtual grid, the way synchronicity discretises time with clock ticks. SiLago (Silicon Lego) blocks are…
T. Kalavathi Devi, Sakthivel Palaniappan
Convolutional codes are comprehensively used as Forward Error Correction (FEC) codes in digital communication systems. For decoding of convolutional codes at the receiver end, Viterbi decoder is often used to have high priority. This decoder meets the demand of high speed and low power. At present, the design of a…
Mehmet Ozdas, Elena Gronskaya, Wolfger von der Behrens, Giacomo Indiveri
On-line classification of neural recordings can be extremely useful in brain-machine interface, prosthetic applications or therapeutic intervention. In this work we present a feasibility study for developing compact low-power VLSI systems able to classify neural recordings in real-time, using spike-based neuromorphic…
Sae Byeok Jo, Joohoon Kang, Jeong Ho Cho
The recent advancements in multivalued logic gates represent a rapid paradigm shift in semiconductor technology toward a new era of hyper Moore's law. Particularly, the significant evolution of materials is guiding multivalued logic systems toward a breakthrough gradually, whereby they are transcending the limits of…
Joshua Ricouvier, Pavel Mostov, Omer Shabtai, Alexandra Tayar + 5 more
The on-chip large-scale-integration of genetically programmed artificial cells capable of exhibiting collective modes is an important goal for fundamental research and technology. Here, we report assembly of a 2D layout of 1024 monolithic DNA compartments as artificial cells on a 5-millimeter square silicon chip.…
Sagar Yadavali, Daeyeon Lee, David Issadore
We present a new, robust three dimensional microfabrication method for highly parallel microfluidics, to improve the throughput of on-chip material synthesis by allowing parallel and simultaneous operation of many replicate devices on a single chip. Recently, parallelized microfluidic chips fabricated in Silicon and…
Sangki Cho, Sueyeon Kim, Myounggon Kang, Seungjae Baik + 2 more
'Jongwook Jeon' 'Zhongrui Wang'] Although the von Neumann architecture-based computing system has been used for a long time, its limitations in data processing, energy consumption, etc. have led to research on various devices and circuit systems suitable for logic-in-memory (LiM) computing applications. In this paper…
Xi Liu, Mengmeng Li, Meile Wu, Shouqiang Zhang + 2 more
'Niravkumar Joshi'] In this article, we propose a highly sensitive vertically plug-in source drain contacts high Schottky barrier based bilateral gate and assistant gate controlled bidirectional tunnel field Effect transistor (VPISDC-HSB-BTFET). It can achieve much more sensitive forward current driving ability than…
Constantine Yannouleas, Uzi Landman
A study of the influence of strong electron-electron interactions and Wigner-molecule (WM) formation on the spectra of 2e singlet-triplet double-dot Si qubits is presented based on a full configuration interaction (FCI) approach that incorporates the valley degree of freedom (VDOF) in the context of the continuous…
Tiffany W Huang, Theodore I Kamins, Zhijie Charles Chen, Bing-Yi Wang + 10 more
To restore central vision in patients with atrophic age-related macular degeneration, we replace the lost photoreceptors with photovoltaic pixels, which convert light into current and stimulate the secondary retinal neurons. Clinical trials of this technology demonstrated shaped vision with prosthetic acuity closely…
Nathan Jensen, Zhijie Charles Chen, Anna Kochnev Goldstein, Daniel Palanker
Modeling of Multi-Electrode Arrays used in neural stimulation can be computationally challenging since it may involve incredibly dense circuits with millions of interconnected resistors, representing current pathways in an electrolyte (resistance matrix), coupled to nonlinear circuits of the stimulating pixels…